Senior Mask Design Engineer - Hardware

Job Description

NVIDIA is seeking a Senior Mask Layout Design Engineer to work on high-speed mixed-signal circuit designs in state-of-the-art sub-micron CMOS technologies using Cadence tools.

Requirements

• BSEE or equivalent experience
• Minimum of 7+ years industry experience in Mask and Layout Design
• Deep understanding of analog circuit layout concepts in submicron CMOS technologies
• Experience with Cadence custom circuit design tools
• Proficiency in scripting languages like perl, python, skill
• Knowledge of DRC and LVS checking flows

Responsibilities

• Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs
• Cross-functional work with ASIC and mixed-signal engineers
• Participating in floor planning, custom layout, and verification processes

Benefits

• Multiple relocation packages
• Two weeklong shutdowns (mid-summer and year-end) in the US (in addition to PTO)
• 8-week parental leave
• 9 Employee Resource Groups
• Annual bonus offering
• Flexible work arrangements
• Up to 6% 401K matching