Senior SerDes System Validation Engineer

Job Description

Lead system validation of mixed-signal SerDes IP at Apple with a focus on high-speed serial links.

Requirements

• MSEE with 10+ years relevant experience or PhD with 7+ years relevant experience
• Knowledgeable about high-speed SerDes protocols
• Experience in system bring-up of high-speed serial links
• Proficiency in scripting (e.g., python, C, Matlab) for automation
• Experience in mixed-signal circuit pre-silicon verification
• Strong communication, teamwork, and problem-solving skills

Responsibilities

• Lead mixed-signal SerDes system validation
• Work on silicon bring-up, debug, and production ramp
• Collaborate with design teams on architecture and DFT needs
• Understand link jitter budget for high-speed serial links
• Provide creative solutions for system validation