Design Verification Engineer

Job Description

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs. Join a dedicated team to ensure the quality of the SOC or an IP or subsystem by reviewing design and architecture specifications, developing test plans, and collaborating with design, architecture, and software teams.

Requirements

• Minimum of BS in relevant field
• Knowledge of computer architecture and digital design fundamentals
• Experience with Verilog or SystemVerilog, digital simulation, and debug
• Experience with scripting languages like Python, Perl, or similar
• Ability to work independently and deliver project goals
• Excellent interpersonal skills

Responsibilities

• Collaborate with chip design teams to ensure SOC quality
• Develop test plans, tests, and coverage plans
• Define verification methodology and testbenches
• Communicate and collaborate with cross-functional teams
• Run regressions, track bugs, and analyze coverage