Design Verification Engineer

Job Description

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs.

Requirements

• Minimum of BS + 3 years relevant industry experience
• Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy
• Knowledge of SystemVerilog, digital simulation and debug
• Knowledge of computer architecture and digital design fundamentals
• SW programming skills with knowledge of data structures and algorithms
• Experience with Python, Perl, or similar scripting language
• Ability to work independently to deliver the project goals
• Knowledge of verification methodologies like UVM
• Experience with C/C++, assembly is a plus
• Excellent interpersonal skills and the dream to tackle diverse challenges

Responsibilities

• Review design and architecture specifications
• Work closely with design & micro-architecture teams
• Develop test plans, tests & coverage plans
• Define the next generation verification methodology & testbenches
• Communicate and collaborate with design, architecture and software to understand use cases and corner conditions
• Drive test cases