CPU Processor Power Management Verification Engineer

Job Description

Join Apple as a Processor Power Management Verification Engineer to work on verifying the functionality correctness of Power Management and Clock Control logic for Apple products.

Requirements

• Minimum BS and 3+ years of relevant industry experience
• Experience with digital logic, micro-processor architecture, or power management architecture
• Experience with digital design verification including knowledge of Verilog/System-Verilog based testbenches, transactors checkers
• Programming skills include scripting languages such as Perl or Python

Responsibilities

• Work closely with architecture and RTL designers on verifying the functionality correctness of the Power Management and Clock Control logic
• Develop and execute test plans and schedules for the power management and clock control logic
• Develop tests in Assembly, Scripts, System Verilog, or vectors according to test plans to drive testing in simulation and emulation environments
• Root cause failures and propose potential solution to the design team
• Develop coverage monitors and analyze coverage to ensure all the test cases in the test plans are covered
• Develop checkers or Verilog/System Verilog-base transactor to verify the design
• Write assertions and apply formal verification to the design