Design Verification Engineer

Job Description

Apple is seeking a design verification engineer to ensure bug-free first silicon for IP designs, develop verification methodology, and execute verification plans.

Requirements

• BS Degree
• Deep knowledge of SystemVerilog and UVM
• Proven experience with verification methodologies and tools
• Experience with serial protocols such as PCIe or USB
• Knowledge of scripting languages such as Python, Perl, TCL

Responsibilities

• Establish DV methodology
• Develop test and coverage plans
• Create verification environment components
• Execute verification plans
• Track and report DV progress