Timing Design Engineer

Job Description

Apple is seeking a Timing Design Engineer to work on challenging and innovative PHY designs for upcoming products.

Requirements

• BS degree in technical discipline with minimum 10 years of meaningful experience
• Thorough knowledge of ASIC design timing closure flow and methodology
• Expertise in writing ASIC timing constraints and timing closure
• Experience in STA tools (Primetime) and flow
• Proficient in scripting languages (Tcl and Perl)
• Strong communication skills

Responsibilities

• Timing sign-off and STA development
• Ownership of IP and block level timing constraints
• Collaboration with design teams for timing closure
• Innovating timing constraints and flow for timing closure