CPU Microarchitect/RTL Engineer - Fetch, Out of Order

Job Description

Apple is seeking an experienced CPU Microarchitect/RTL Engineer to drive architecture and RTL development of CPU front-end and/or out-of-order subsystem for performant cores.

Requirements

• Minimum BS and 10+ years of relevant industry experience
• Knowledge of microprocessor architecture
• Knowledge of Verilog and/or VHDL
• Experience with simulators and waveform debugging tools
• Knowledge of logic design principles along with timing and power implications

Responsibilities

• Micro-architecture development and specification
• RTL ownership - development, assessment, and refinement of RTL design
• Verification support - test bench development, formal methods, and simulation/emulation
• Performance exploration and correlation
• Design delivery