Sr. ASIC Implementation Engineer, DBF Silicon

Job Description

Project Kuiper is seeking a skilled individual to be part of the team responsible for defining and implementing digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways.

Requirements

• Bachelor's degree in Electrical / Communications Engineering or related field, or equivalent experience
• 7+ years of experience in ASIC implementation, i.e., synthesis, STA and working with P&R for deep sub-micron nodes, preferably 16nm or smaller
• Experience leading or solely developing the methodology and scripts for physical synthesis
• Proven track record in taping out chips that have gone into high volume production
• Familiarity with implementing chips that have multiple power islands and power gating

Responsibilities

• Set up the flow for logic and physical synthesis for various technology nodes
• Work with ASIC design and DFT teams to understand the design and create timing constraints
• Check the RTL design for clean synthesis run, perform STA and LEC on netlist
• Ensure top-level integration of analog blocks are done properly and correct by construction
• Lead the timing sign-off for the post P&R database
• Verify the IR/EM results to ensure the chip meets the required DFM criteria

Benefits

• Medical, dental, and vision coverage (multiple plan options)
• Health savings and flexible spending accounts
• 24/7 Employee Assistance Program for mental health support
• 401(k) with company match and various investment choices
• Company-paid life/AD&D and disability insurance
• Restricted stock units (RSUs) for employee ownership
• Child care and elder care referrals, adoption assistance
• Paid maternity and parental leave (including Ramp Back)
• Paid time off (PTO) and company holidays
• Employee discount on Amazon.com products
• Career Choice program (95% tuition and textbook coverage)