Senior ASIC Verification Engineer, Coherent High Speed Interconnect

Job Description

NVIDIA is seeking a Senior ASIC Verification Engineer to work on high-speed coherent interconnect design for mobile SoCs and GPUs, impacting various product lines from consumer graphics to self-driving cars and artificial intelligence.

Requirements

• Bachelors or Master’s Degree (or equivalent experience) in a relevant field
• 3+ years of verification experience
• Experience in architecting test bench environments for unit level verification
• Background in verification using random stimulus, functional coverage, and assertion-based verification methodologies
• Prior Design or Verification experience of Coherent high-speed interconnects
• Knowledge of industry standard interconnect protocols like PCIE, CXL, CHI
• Strong background in developing TB's from scratch using SV and UVM methodology
• C++ programming language experience, scripting ability, and expertise in System Verilog
• Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB)
• Strong debugging and analytical skills
• Experienced communication and interpersonal skills
• History of mentoring junior engineers and interns

Responsibilities

• Verify the design and implementation of high-speed coherent interconnects
• Responsible for micro-architecture using sophisticated verification methodologies
• Understand design & implementation, define verification scope, develop verification infrastructure, complete test/coverage plans, and verify correctness of design
• Collaborate with architects, designers, emulation, and silicon verification teams

Benefits

• Multiple relocation packages
• Two weeklong shutdowns (mid-summer and year-end) in the US (in addition to PTO)
• 8-week parental leave
• 9 Employee Resource Groups
• Annual bonus offering
• Flexible work arrangements
• Up to 6% 401K matching