Senior Memory Post Silicon Qualification Engineer

Job Description

NVIDIA is seeking a talented individual to join their Silicon Solutions Engineering group to drive memory qualification on current and future Tegra/GPU silicon/products, with potential for growth into a management role.

Requirements

• B. Tech or M. Tech in Electronics Engineering or equivalent experience
• 8+ years of experience in the semiconductor industry with a minimum of 2 years in memory interface validation
• Strong understanding of the protocol for DRAM types like GDDR/LPDDR
• Familiarity with HW lab environment and lab equipment like DMM, Oscilloscope, thermal solutions, etc.
• Experience in writing lab automation scripts using C/Python/Perl
• Background in understanding PCB stack-up, board layouts, power planes, and SI guidelines

Responsibilities

• Bring up a high-speed memory interface on complex chips like GPUs and SoCs
• Functional validation, IO tuning, and PVT testing of memory controller and DRAM
• Optimizing Memory IO settings to support multiple memory configurations involving different types of DRAMs and vendors
• Identify functional issues, perform root-cause analysis, and drive issue closure
• Coordinate with design, arch, and board teams as required
• Collaborate with pre-Si team to understand new features and create validation test plans

Benefits

• Multiple relocation packages
• Two weeklong shutdowns (mid-summer and year-end) in the US (in addition to PTO)
• 8-week parental leave
• 9 Employee Resource Groups
• Annual bonus offering
• Flexible work arrangements
• Up to 6% 401K matching