Senior Power Integrity Methodology Engineer

Job Description

NVIDIA is looking for a Senior Power Integrity Methodology Engineer to develop physical design methodologies for rail analysis and signoff for NVIDIA chips.

Requirements

• Master's degree or equivalent experience in Electrical Engineering or related field
• Minimum 5+ years of experience in IR/EM/Thermal flow methodology development and support
• Strong understanding of all aspects of IR/EM/thermal analysis and signoff
• Familiar with hierarchical design approach and hierarchical signoff
• Proficiency in programming and scripting languages such as TCL, Perl, Python, and C++

Responsibilities

• Developing physical design methodologies for rail analysis and signoff
• Coming up with unique and creative solutions for pioneering IR analysis and signoff for NVIDIA chips
• Participating and developing flow and tool methodologies for power and noise analysis across multiple projects

Benefits

• Multiple relocation packages
• Two weeklong shutdowns (mid-summer and year-end) in the US (in addition to PTO)
• 8-week parental leave
• 9 Employee Resource Groups
• Annual bonus offering
• Flexible work arrangements
• Up to 6% 401K matching