Senior ASIC Design Engineer - Hardware

Job Description

NVIDIA is seeking a top-notch ASIC engineer to join the Clocks group responsible for crafting all aspects of GPU and CPU clocking.

Requirements

• BS in Electrical Engineering or equivalent experience (MS preferred)
• 3+ years of relevant work experience
• Deep understanding of logic optimization techniques and PPA trade-offs
• Excellent interpersonal skills and ability to collaborate with multiple teams
• Experience in RTL design (Verilog), verification, and logic synthesis
• Strong coding skills in python or other industry-standard scripting languages
• Understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects is a plus
• Implementing on-chip clocking networks is a bonus

Responsibilities

• Architecting the clock domain to satisfy functional, physical, and testing design requirements
• Engaging with multiple teams to design GPU or CPU clocks to satisfy architectural/design/physical constraints
• Improving Power, Performance, and Area (PPA) of NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization, and Ease of timing closure
• Collaborating with Physical design and timing team to evaluate Clocking concerns and develop solutions for supporting high-speed Clocking
• Delivering clock RTL information to GPU, CPU and SOC verification team, timing, and DFT teams
• Involvement in the end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup

Benefits

• Multiple relocation packages
• Two weeklong shutdowns (mid-summer and year-end) in the US (in addition to PTO)
• 8-week parental leave
• 9 Employee Resource Groups
• Annual bonus offering
• Flexible work arrangements
• Up to 6% 401K matching