SoC Physical Design Engineer, PnR

Job Description

Join Apple in a visible role where you will be responsible for the physical implementation of design partition(s) for a complex SOC using innovative process technology.

Requirements

• Minimum BS and 10+ years of relevant industry experience.
• MS in Electrical/Electronics/Computer Engineering or related field.
• Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ.
• Familiar with various process-related design issues including Design for Yield and Manufacturability and multi-vt strategies.
• Strong communication skills.

Responsibilities

• Work with logic design team to understand partition architecture and drive physical aspects early in the design cycle.
• Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals.
• Timing, physical and electrical verification, and driving the signoff closure for the partitions.
• Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution.
• Drive optimization of PnR partitions to achieve best Power/Performance/Area.

Benefits

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.