Job Description
As a DRAM Design Validation Engineer in Apple's Silicon Technologies group, you will be responsible for ensuring the successful integration of DRAM memories with SoC devices, working closely with design, verification, and integration engineers.
Requirements
- Expert in DRAM cell architectures
- Expert of DRAM memory organization and periphery design for low DRAM power
- Expertise in DRAM simulation
- Experience in memory interface verification with understanding DDR-PHY and Memory Controller
- Experience in LPDDR IO (DDR/DDR2/DDR3/DDR4/DDR5) characterization and qualification
- Understanding of memory test patterns
- Knowledge of DRAM reliability
- Knowledge with innovative packaging technology (POP, TSV, etc.) and their relationship to DRAM signal/power integrity
- Previous experience in Failure Analysis of DRAM devices
- Excellent hardware and software debug skills
- Experience working with the major DRAM vendors
- Strong background in computer architecture
- Programming experience in C/C++
- Excellent interpersonal skills and teamwork
Responsibilities
- Work with design, verification, and integration engineers to define memory controller and PHY requirements
- Collaborate with Architecture, MCU, DDRPHY, and DRAM vendors for Apple’s main memory feature
- Ensure DRAM simulation meets Apple's requirements
- Ensure internal and external DRAM silicon and package level testing needs are met
- Debug RMA material with apparent DRAM related defects
