Job Description

NVIDIA is seeking a versatile engineer to join its Silicon HW team, focusing on developing and proposing new power management features that will impact the next generation of NVIDIA products across various segments.

Requirements

BS or MS degree in EE/CE or equivalent experience.
Minimum of 8+ years working experience in Energy/Power Optimization, Data Centers, and ASICs.
Experience in working with and optimizing Data Center systems.
Experience with ASIC power-saving features and system-level power-saving features.
Deep understanding of firmware/driver structures and their interaction with HW.
Working knowledge of PVT dependencies and binning methodologies.
Strong EE fundamentals, knowledgeable in digital design, computer architecture, power analysis, timing analysis, fault analysis, sampling, statistics, and scripting.
Effective in a collaborative environment.

Responsibilities

Develop system-level power features to address existing and new product opportunities/requirements.
Understand and optimize DL/AI workloads on Data Center platforms.
Prototype features on existing silicon/platforms and lead technical return-on-investment investigations.
Analyze workload profiles to identify potential opportunities.
Provide input on pitfalls and opportunities during feature proposal reviews.
Lead debug efforts to root cause feature sequences bugs, silicon bugs, and system-level issues.
Work closely with other engineering teams to drive next-generation product design, development, debugging, and release.