Job Description

NVIDIA is seeking an RTL Analysis Methodology Engineer to join their Logic Design Implementation team, focusing on static RTL verification methodologies for ASIC design. The role involves evaluating EDA tools, developing RTL analysis flows, and collaborating with ASIC designers and EDA vendors to enhance methodologies.

Requirements

BS or MS in Electrical, Computer Engineering or equivalent experience with 4+ years of proven experience with tools and methodologies for ASIC design and verification.
Knowledge of Verilog and System Verilog HDL.
Proficiency in Python.
Debugging and problem-solving skills.
Excellent communication and collaboration skills.

Responsibilities

Evaluate new EDA tools and features and advance static verification methodologies.
Contribute to architecting and developing brand-new RTL analysis flows.
Create new workflows for data collection, analysis, and reporting to provide methodology insights.
Set up and maintain flow regressions and QA.
Analyze and debug issues, build solutions or workarounds.
Act as liaison between ASIC designers and EDA vendors.

Benefits

Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.