Formal Verification Staff Engineer
AMD Santa Clara, CA Full-time 3/24/2026 $159.8k - $239.8k per year
Undergraduate Entry-Level
Approval 98.6%•Total filings 728•New hires 184•
✓ Established Sponsor
•FY 2025Job Description
AMD is seeking a self-motivated formal verification engineer to join their collaborative team, focusing on delivering high-quality technologies for next-generation processor cores. The role involves applying advanced formal verification techniques and maintaining a robust verification infrastructure while fostering innovation across departments.
Requirements
- BS in Computer Engineering, Computer Science, Electrical Engineering or related fields with extensive work experience, and/or MS/PhD with some work experience
- Experience in ASIC design, verification, or related work in Formal Verification
- Skills in Formal verification, Assertion based verification, FPV and/or DPV
- Knowledge in Complexity Analysis, Design Abstraction & Formal Coverage
- Experience in Design debug and Deep bug hunting
- Familiarity with Formal test planning and Formal tools – Jasper and/or VC-formal
- Proficiency in System Verilog, Verilog or VHDL, Scripting (TCL/Python)
- Design knowledge in CPU, GPU, Bus/Noc/Interconnect, Memory Controllers, Cache preferred
Responsibilities
- Apply Advanced Formal Verification Techniques to AMD's cutting edge design for achieving Full Proofs
- Maintain the best-in-class formal verification infrastructure to improve formal verification productivity
- Develop technical relationships with the broader AMD Design community and peers
- Drive cross-department innovation and collaboration inside AMD
- Be part of the R&D group for emerging formal verification domains like security, safety, low power, architecture level formal verification
Benefits
- AMD provides a competitive 'Total Rewards' package that focuses on financial growth, health, and work-life balance.
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