Tesla's AI Hardware team is seeking a Staff STA Engineer to lead timing signoff for advanced SoC designs at 3nm and below. The role involves driving full-chip and block-level static timing analysis, ensuring product readiness through timing closure, and leveraging AI for automation in timing workflows.

• Degree in Electrical Engineering, Computer Engineering, or related field, or equivalent work experience
• 7+ years in STA and timing signoff
• Deep expertise in timing fundamentals: setup/hold, skew, jitter, latency, MMMC methodology
• Hands-on experience with industry STA signoff tools
• Experience at advanced nodes (5nm and below)
• Ability to use AI agents to automate and accelerate timing analysis workflows

• Drive full-chip and block-level STA across all PVT corners and modes (MMMC)
• Own timing closure — identify and resolve setup/hold violations, clock skew, crosstalk, IR drop, and process variation impacts
• Develop, maintain, and validate timing constraints for complex SoC/ASIC designs
• Lead signoff timing analysis using industry-standard EDA tools
• Execute and support ECO implementation for timing fixes through tapeout
• Perform timing analysis for 3D IC architectures across TSV interconnects — model parasitics (RC delay, coupling), validate cross-die clock distribution, and address latency and synchronization across dies
• Analyze thermal and voltage impacts on TSV timing paths
• Validate timing across interposer and multi-die communication paths (DDR, PCIe, SerDes)
• Leverage AI agents to automate timing debug, constraint validation, and signoff workflows

• Employees at Tesla are often offered day-one coverage with multiple medical options (some at $0 paycheck cost), dental/vision, company HSA contributions, a 401(k) match, and equity programs. Most roles also include paid time off and holidays, family-building support, employee assistance, commuter and childcare benefits, and access to discounts and wellness programs.