As a design engineer in the CAD and methodology team at AMD, you will lead and optimize the EDA environment for the Adaptive & Embedded Computing Group. Your role involves overseeing the complete SCH-to-GDS flow, managing tool deployments, and driving methodology development across semiconductor projects. You will shape the technical direction of IC design workflows and collaborate with various teams and vendors. This position requires a passion for processor architecture and strong problem-solving skills.

• Proficiency in TCL, Python, PERL, or other scripting languages
• Experience with PDKs and technology enablement
• Skilled in Spice and PVT simulation environments
• Hands-on expertise with Virtuoso-based custom layout tools and flows
• Familiarity with Calibre extraction flows and EM/IR analysis using Totem and Redhawk
• Working knowledge of SiliconSmart, PrimeTime, and Physical aspect of VLSI designs
• Strong written and verbal communication skills
• Bachelor's degree in Computer or Electrical Engineering, or equivalent; Master's degree preferred

• Execute in CAD infrastructure team supporting multiple IC design projects
• Establish and maintain standardized design flows and methodologies
• Implement and support customized CAD flows for Fabric design groups
• Enable the team to meet design and development targets by working closely with external tool vendors
• Develop tools flows methodologies on digital back-end domains, sign-off flows for timing, power, EM/IR, DRC/LVS/DFM, etc.
• Improve engineering efficiency while improving design quality in IP release process
• Be single point contact for bugs and issues for custom and analog physical design team
• Build flow in TCL, Python to ensure quality and faster executions
• Understand different methodologies used across industry to adopt best practices
• Leverage and deploy AMD AI systems to design teams

• AMD provides a competitive 'Total Rewards' package that focuses on financial growth, health, and work-life balance.