As an IP verification engineer in the AECG Group at AMD, you will contribute to the development of cutting-edge FPGA and ASIC technologies for various customers. You will be part of the front-end design and integration team, collaborating closely with architecture, IP design, and product engineering teams to ensure successful silicon outcomes. The role emphasizes a passion for complex IP architectures and digital design, requiring strong analytical and problem-solving skills. You will work in a collaborative environment, engaging with engineers across different locations and time zones.

• Bachelor's or Master's degree in computer engineering or Electrical Engineering
• Experience with PCIe, CXL, NVMe, or ethernet protocols
• Proficient in IP level ASIC verification
• Expert in Verilog, System Verilog, and Object Oriented programming
• Expertise in developing UVM based verification frameworks and testbenches
• Strong communication skills and ability to work independently as well as in a cross-site team environment

• Collaborate with architects, hardware engineers, and firmware engineers to understand new features to be verified for PCIe CXL based IPs.
• Develop test plan documentation that accounts for interactions with other features, hardware, firmware, and software driver use cases.
• Code IP or SS level UVM based testbenches and verification components such as monitors, scoreboard, and checkers.
• Build directed and random verification tests.
• Run regressions and debug test failures to ensure high design functional, performance, and implementation quality.

• AMD provides a competitive 'Total Rewards' package that focuses on financial growth, health, and work-life balance.