JobsLead SERDES RTL Design Engineer
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Lead SERDES RTL Design Engineer

AMD

Location

San Jose, CA

Type

Full-time

Posted

5/5/2026

Compensation

USD $203,000.00/Yr. – USD $290,000.00/Yr.

Undergraduate with 5+ Years of Experience
Approval 98.6%·Filings 728·New hires 184·
Established Sponsor
·FY 2025

Job description

The SerDes Technology group at AMD is looking for a SerDes Micro Architect with expertise in high-speed SerDes RTL design. This role involves driving architecture and product requirements while integrating complex IPs into SOC. The ideal candidate will have a strong focus on Power, Performance, and Area, and will work with a talented team to define next-generation high-speed SerDes IPs. Strong communication skills and a detail-oriented mindset are essential for success in this position.

Requirements

  • Bachelor's or Master's degree in a related discipline
  • Deep knowledge of digital design methodology
  • Experience in driving the definition of high-speed SerDes IPs
  • Strong knowledge of the application in PCIe and Ethernet
  • Good knowledge of SystemVerilog and UVM

Responsibilities

  • Define micro-architecture requirements for SerDes IPs and drive technical specifications to meet those requirements.
  • Design and develop digital logic blocks in leading edge technology nodes.
  • Work with cross-functional teams to identify and assess complex technical issues and develop architectural solutions.
  • Collaborate closely with design teams for area and floorplan refinement, verification test plan reviews, and timing targets.
  • Support post-Si teams for product performance, power, and functional issues debug and resolution.

Benefits

  • AMD provides a competitive 'Total Rewards' package that focuses on financial growth, health, and work-life balance.

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