The candidate will join a prominent team at AMD focused on high-speed physical interface (PHY) and mixed signal IP integration and support. This role involves working with third-party SERDES and mixed signal IP across various AMD products. The team collaborates with integration and post-silicon teams, as well as IP vendors and customers. The ideal candidate should be self-motivated and possess strong problem-solving skills.

• Strong professional experience in the semiconductor industry with analog mixed-signal circuit/system design, analysis, validation, and test.
• Design knowledge of high-speed I/O SerDes architectures and mixed-signal IP.
• Experience with interface protocols such as PCIe, Ethernet, USB, DisplayPort, HDMI, and MIPI.
• Familiarity with advanced FinFET semiconductor technologies at and below 7nm.
• Basic understanding of RTL, logic design, and digital circuits.
• Proficiency in Python and/or Perl programming and familiarity with UNIX environments.
• Laboratory experience with equipment such as BERT, oscilloscope, and logic analyzer.
• Strong analytical and problem-solving skills, with attention to detail.
• Good teamwork and communication skills.

• Serve as the AMD technical owner of various third-party SERDES and mixed signal IP.
• Provide pre- and post-silicon IP leadership and support for SerDes PHYs and other mixed signal IP.
• Work directly with third-party IP vendors to support design transfer and integration of IP across AMD products.
• Collaborate with AMD integration teams on checks for electrical, logical, and physical quality.
• Support IC package and PCB design teams in evaluating signal and power integrity analyses.
• Perform technical evaluation of new IP for licensing.
• Provide post-silicon support from first silicon bring-up to customer support.
• Translate post-silicon learnings into suggestions for new IP design processes.

• AMD provides a competitive 'Total Rewards' package that focuses on financial growth, health, and work-life balance.