NVIDIA is seeking Senior Physical Design Engineers to join its Networking Silicon engineering team, focusing on the development of high-speed communication devices. The role involves leading physical design and implementation of SOC devices for networking markets. Candidates will work on chiplet and partition levels, contributing to methodologies and flow automation. This position offers an opportunity to make a significant impact in a technology-driven environment.

• BSEE / MSEE or equivalent experience.
• 5 years of experience in VLSI physical design implementation on 5nm, 4nm and 3nm technology.
• A successful track record of delivering designs to production is a requirement.
• Strong power user of P&R, Timing Analysis, Physical Verification, IR Drop Analysis, CAD tools from Synopsys and Cadence.
• Proficiency using Python, Perl, Tcl, Make scripting is helpful.

• Lead all aspects of physical design and implementation of SOC devices targeted at the networking markets.
• Participate in establishing physical design methodologies and flow automation.
• Involve in chip floorplan, power/clock distribution, chip assembly and P&R, timing closure.
• Conduct trial synthesis, power and clock distribution, place and route, timing closure, power and noise analysis and physical verification.

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.