This role involves working within a wireless SOC organization focused on developing highly energy efficient wireless silicon technologies. The team is dedicated to innovating new technologies that enhance user experiences across Apple products. You will collaborate with various product development groups to push the boundaries of wireless systems. The position emphasizes the importance of layout design and verification in the development process.

• Bachelor's degree and 3+ years of relevant industry experience
• Good understanding of RC delay, electromigration, and coupling
• Experience in custom RF/analog layout for radio transceivers with knowledge of deep sub-micron CMOS
• Excellent communication skills and ability to work with multi-functional teams
• High level proficiency in interpretation of CALIBRE DRC, ERC, LVS in FinFet Technology
• Extensive knowledge of CADENCE layout tools

• Perform block level and top-level layout through the full verification flow, including extraction, DRC, LVS, and DFM checking
• Collaborate with designers on block-level and top-level floorplanning
• Conduct layout reviews for power/gnd routing, electromigration, signal path checks, differential and IQ matching, and signal coupling
• Manage top-level layout integration and verification schedules
• Lead other layout engineers for top-level integration

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.