The Cellular ASIC Design Engineer will architect and implement protocol processing hardware for next-generation wireless SoCs. This role involves managing the full lifecycle from architectural exploration to silicon bring-up and lab validation. The engineer will work closely with software, firmware, and verification teams to ensure the hardware meets performance, flexibility, and power efficiency goals. This position requires a strong background in ASIC design and a collaborative mindset to drive innovation.

• BS degree and a minimum of 10 years relevant industry experience
• Hands-on expertise in SystemVerilog and Verilog
• Experience with low-power design techniques
• Proficiency with AMBA bus protocols (AXI, AHB) or similar on-chip NoCs
• Understanding of cellular MAC, WiFi MAC or other data-link layer (L2) protocols
• Solid grasp of IP and TCP/UDP protocols
• Knowledge of security algorithms (AES or similar)
• MS or PhD in Computer Engineering or Electrical Engineering

• Architect and implement protocol processing hardware for wireless SoCs
• Own the full lifecycle from architectural exploration to silicon bring-up
• Collaborate with software, firmware, and verification teams
• Design and optimize scheduling and QoS mechanisms
• Develop architectural models in C/C++ or SystemC

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.