The ASIC Power Engineer will focus on SoC power simulation, analysis, and optimization for next-generation wireless SOC products. This role requires deep technical expertise in power estimation and a commitment to developing highly power-efficient SoCs. The engineer will work closely with a team of talented professionals to integrate innovative power solutions and achieve industry-leading power efficiency. Responsibilities include power estimation, use case analysis, and driving optimization strategies for power-critical wireless products.

• BS in Electrical Engineering, Computer Engineering, or related technical field
• Hands-on experience with PtPx and PPRTL power analysis tools
• Proficiency in scripting languages including Python, Perl, or TCL
• Understanding of electrical properties of on-die PDN, power gating, package and system power delivery
• Hands-on experience with SoC power domains and power management unit (PMU) interactions in complex multi-core chipsets
• Knowledge of power impact at architecture, logic design, and circuit levels
• Experience in power model development for complex SoCs
• Familiarity with SoC design flow and methodology
• Strong communication skills to collaborate effectively across multiple engineering disciplines
• Knowledge of WiFi or Bluetooth standards and protocols
• Experience in SoC power simulation, modeling, and analysis flow development
• Experience in ASIC power estimation, analysis and optimization methodologies
• Experience in power model development for IPs
• Hands-on experience in correlating pre-silicon power models with measured silicon data and driving model accuracy improvements through systematic debugging

• Work with architects to define power-critical use cases and scenarios
• Establish power targets and collaborate with cross-functional teams to achieve optimization goals
• Define comprehensive test cases within design verification environments
• Generate accurate pre-silicon power estimations for design decision-making
• Analyze power consumption patterns and identify optimization opportunities
• Develop SoC power models for new architecture designs, enabling performance/power trade-off analysis
• Understand software and system-level interactions that impact overall power consumption
• Partner with lab and silicon characterization teams to correlate models with measured silicon data

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.