The RTL Design Engineer for Machine Learning at Google will focus on shaping the future of AI/ML hardware acceleration. This role involves driving the development of custom silicon solutions, particularly Tensor Processing Units (TPUs), which are crucial for Google's AI applications. The engineer will work within a team that emphasizes innovation and collaboration across software and architecture teams. This position offers the opportunity to contribute to groundbreaking technology that impacts millions of users worldwide.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience with custom silicon design, including SoCs and ASICs.
• Experience with RTL design using Verilog or SystemVerilog.
• Master's degree or PhD in a relevant field is preferred.
• Experience with a scripting language such as Python or Perl.

• Understand the overall application of the chip and propose improvements in design.
• Design and document one or more blocks of an ASIC, focusing on functionality and timing.
• Collaborate closely with software teams on functionality, interfaces, and documentation.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.