The RFIC Layout Engineer will be an integral part of the Wireless SoC Radio Team, which focuses on designing energy-efficient CMOS radios. This role involves researching and designing advanced RF, analog, and mixed-signal blocks for next-generation wireless technologies. The engineer will work in high-volume production environments utilizing advanced CMOS technology nodes. A strong emphasis is placed on custom RF/analog layout for radio transceivers.

• Minimum requirement of a bachelor's degree
• Experience in FinFet technology
• Extensive knowledge of deep sub-micron CMOS
• Proficiency in interpreting CALIBRE DRC, ERC, LVS in FinFet Technology
• Knowledge of CADENCE layout tools
• Excellent communication skills
• Scripting skills in PERL or SKILL

• Research and design RFIC layouts for next-generation wireless technologies
• Ensure device matching, minimize parasitics, and implement RF shielding
• Understand and apply advanced process effects such as LOD and WPE
• Collaborate with team members to bring designs into high-volume production
• Utilize layout techniques to optimize performance in RF transceivers

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.