The RFIC Layout Engineer will be a vital member of the Wireless SoC Radio Team, which focuses on designing highly energy-efficient CMOS radios. This role involves researching and designing RF, analog, and mixed-signal blocks for next-generation wireless technologies. The engineer will work on custom RF/analog layout for radio transceivers and contribute to high-volume production in advanced CMOS technology nodes. The position requires a solid understanding of various layout techniques and advanced process effects.

• Bachelor's degree in a relevant field.
• Experience with FinFet technology.
• Extensive knowledge of deep sub-micron CMOS.
• Proficiency in layout techniques for device matching and minimizing parasitics.
• Solid understanding of RC delay, electromigration, and coupling.
• Knowledge of guard rings, DNW, PN junctions, and advanced process effects.
• High proficiency in interpreting CALIBRE DRC, ERC, LVS in FinFet Technology.
• Familiarity with CADENCE layout tools.
• Excellent communication skills.
• Scripting skills in PERL or SKILL.

• Research and design RF, analog, and mixed-signal blocks.
• Create custom RF/analog layouts for radio transceivers.
• Ensure high-volume production readiness of wireless technologies.
• Apply layout techniques to enhance device performance.
• Interpret and analyze CALIBRE DRC, ERC, LVS results.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.