The DDR Design Engineer at Apple will be part of a dynamic team focused on creating high-performance, low power PHY designs. This role involves engaging in all phases of design, from concept studies to silicon bring-up. The engineer will collaborate closely with architecture, circuit designers, and verification engineers to ensure high-quality RTL design. This position offers the opportunity to work on innovative products that impact millions of customers.

• BS degree in a technical discipline
• Minimum 10 years of relevant experience
• Proficiency in RTL design using Verilog or SystemVerilog
• Experience in writing assertions and designing state machines
• Understanding of Design For Test concepts and writing DFT friendly RTL
• Familiarity with Unified Power Format for simulation and synthesis

• Perform concept studies and provide direction on performance, gate count, and power for digital designs.
• Write detailed design specifications and test plans in collaboration with other engineers.
• Provide high-quality RTL descriptions, including assertions, for designs.
• Use formal tools and static checkers to ensure RTL quality.
• Support design verification to ensure bug-free first silicon.
• Drive functional and code coverage as well as timing closure for designs.
• Support silicon bring-up, performance, and power characterization.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.