Join Apple's wireless silicon development team, focusing on designing CPU-based subsystems for high performance, low power wireless SoCs. This role involves collaboration with SoC architects and IP developers to achieve power, performance, and area goals. You will engage in discussions about hardware/software/power partitioning with various engineering teams. This highly visible position plays a critical role in launching leading-edge products that enhance user experiences.

• BS degree with 10+ years of relevant experience.
• Familiarity with the ASIC design flow.
• Knowledge of digital design, SoC architecture, and HDL languages like Verilog.
• Experience writing micro-architecture specifications and converting them to design.
• Exposure to design methodologies and industry standard EDA tools.
• Experience with AXI/AHB bus fabric and processor sub-systems.
• Understanding of UPF and low-power design and implementation techniques.
• Self-starter with a willingness to learn.

• Design CPU-based subsystems for high performance, low power wireless SoCs.
• Collaborate closely with SoC architects and IP developers.
• Participate in hardware/software/power partitioning discussions.
• Integrate industry standard and custom hardware IPs into SoCs.
• Contribute to ASIC design efforts with a focus on low power metrics.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.