The RFIC Layout Engineer will be an integral part of the Wireless SoC Radio Team, which focuses on designing highly energy-efficient CMOS radios. This role involves researching and designing advanced RF, analog, and mixed-signal blocks for next-generation wireless technologies. The engineer will work in advanced CMOS technology nodes to bring these designs into high-volume production. A strong emphasis is placed on custom RF/analog layout for radio transceivers.

• A bachelor's degree is required.
• Experience with FinFet technology is necessary.
• Extensive knowledge of deep sub-micron CMOS is essential.
• Proficiency in CADENCE layout tools is required.
• Scripting skills in PERL or SKILL are needed.

• Research and design RFIC layouts for wireless technologies.
• Ensure device matching and minimize parasitics in layouts.
• Implement RF shielding and high-frequency routing techniques.
• Interpret CALIBRE DRC, ERC, and LVS in FinFet technology.
• Collaborate with team members to bring designs into production.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.