This role is part of Apple's wireless silicon development team, focusing on designing CPU-based subsystems for high performance, low power wireless SoCs. The team emphasizes energy-efficient design and innovative technologies to enhance user experience. You will collaborate with SoC architects and IP developers to achieve power, performance, and area goals for Apple devices. This position is highly visible and critical in launching leading-edge products.

• Minimum requirement of a bachelor's degree.
• Familiarity with the ASIC design flow.
• Knowledge of digital design, SoC architecture, and HDL languages like Verilog.
• MSEE with some years of industry experience.
• Experience writing micro-architecture specifications and converting them to design.
• Exposure to design methodologies and industry standard EDA tools.
• Experience with AXI/AHB bus fabric and processor sub-systems.
• Understanding of UPF and low-power design & implementation techniques.
• Self-starter and willingness to learn.

• Work on a small team designing CPU-based subsystems for wireless SoCs.
• Collaborate with SoC architects and IP developers to develop SoCs.
• Engage in hardware/software/power partitioning discussions with engineering teams.
• Integrate industry standard and custom hardware IPs into SoCs.
• Contribute to ASIC design efforts with a focus on low power metrics.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.