As a Power Flow Methodology Engineer in the Low Power group within Silicon Technologies, you will focus on developing and enhancing low-power design flows for Apple's next-generation chips. This role involves creating automated solutions that improve power efficiency and working on methodologies that will be utilized across various technologies. You will collaborate with designers to address inquiries and resolve issues related to power domains. Your contributions will impact highly visible products used by millions daily.

• Bachelor's degree and a minimum of 3 years of relevant industry experience
• Good understanding of VLSI designs and SOC design flows
• Strong passion for scripting and low-power domain-specific knowledge
• Strong background with flow development and object-oriented programming languages such as Python, C++, or Java
• Solid understanding of modern software testing and development practices
• Good written and verbal communication skills

• Develop and enhance low-power flows for chip design
• Deliver automated solutions for the Silicon Engineering Power team
• Assist in the architecture, implementation, and verification of low-power design flows
• Create flows and tools related to power analysis, optimization, and verification
• Communicate with the design team to address questions and resolve issues

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.