As a CPU Verification Engineer at Apple, you will play a crucial role in the chip design effort, collaborating with various disciplines to ensure the functionality correctness of CPU designs. This position involves working closely with architecture and RTL designers to deliver innovative products to millions of customers. You will be responsible for developing test plans, creating complex tests, and analyzing coverage to ensure comprehensive verification. Your contributions will directly impact the quality and performance of Apple's hardware products.

• Bachelor's degree in a relevant field.
• Academic experience in digital logic design, chip architecture, and microarchitecture.
• Experience with C/C++ programming and Verilog.
• Knowledge of advanced verification techniques such as formal and assertions.
• Understanding of the silicon bring-up process.
• Experience with the development of test plans/test benches and writing/debugging assembly-based tests.

• Work closely with architecture and RTL designers on verifying the functionality correctness of the design.
• Develop and lead test plans and test environments.
• Develop complex tests in assembly, C, or vectors according to test plans.
• Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered.
• Develop checkers or C-based transactors to verify the design.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.