Apple's Silicon Engineering Group is seeking a dedicated engineer for the CPU gate level verification team. This role involves working within Apple's leading CPU design team to develop verification flows that ensure high standards for functional verification. The engineer will focus on logic equivalence checks and sign-off for high-performance CPU projects. The position requires collaboration with design and CAD teams to enhance verification methodologies and automate processes.

• Minimum BS degree and 10+ years of relevant industry experience
• Experience with at least one RTL-to-gate formal verification tool such as Conformal or Formality
• Experience in digital logic design
• Proficiency in at least one programming language, such as TCL, Python, or Perl
• Knowledge of RTL-to-gate formal verification tools and debug techniques

• Develop and improve existing flows for logical equivalence checks
• Run and sign off on block and top level logic equivalence checks, structural gate checks, and low power checks
• Support the design team in block level verification runs and debugging
• Work closely with design and CAD teams on verification methodologies for new features
• Create scripts to automate verification runs and track results
• Collaborate with the CAD team to enhance verification flows
• Engage with tool vendors on new tool features and issues

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.