In this role as a CPU Processor Power Management Verification Engineer at Apple, you will be integral to the chip design effort, collaborating with various teams to ensure the functionality of Power Management and Clock Control logic. Your work will have a significant impact on delivering innovative products to millions of customers. The position requires a strong focus on verification processes, including developing test plans and executing tests in simulation and emulation environments. You will also engage in root cause analysis and collaborate with the silicon bringup team to aid in debugging.

• Minimum BS degree and 3+ years of relevant industry experience
• Experience with digital logic, micro-processor architecture, or power management architecture
• Experience with digital design verification including Verilog/System-Verilog based testbenches and transactors checkers
• Programming skills in scripting languages such as Perl or Python
• Master's degree preferred
• Experience in processor or power management architecture and verification
• In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches
• Experience in system Verilog assertions or silicon bringup or UPF and low power simulation
• Experience with advanced verification techniques such as formal verification is a plus
• Advanced programming skills such as object-oriented programming or CPU assembly language is a plus
• Excellent communication skills with the ability to articulate complex design issues

• Work closely with architecture and RTL designers on verifying the functionality correctness of the Power Management and Clock Control logic
• Develop and execute test plans and schedules for the power management and clock control logic
• Develop tests in Assembly, Scripts, System Verilog, or vectors according to test plans to drive testing in simulation and emulation environments
• Root cause failures and propose potential solutions to the design team
• Work with the silicon bringup team on developing tests that work in the emulation and FPGA environments
• Aid silicon debug in related parts of the design
• Develop coverage monitors and analyze coverage to ensure all the test cases in the test plans are covered
• Develop checkers or Verilog/System Verilog-based transactors to verify the design
• Write assertions and apply formal verification to the design
• Create and follow detailed work schedules and work independently on the verification efforts for a block/area of the design

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.