JobsCAD Engineer - Timing for Gate-Level Flows & Methodologies
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CAD Engineer - Timing for Gate-Level Flows & Methodologies

Apple

Location

USA (Multiple Locations)

Type

Full-time

Posted

5/5/2026

Compensation

Not listed

Undergraduate with 2+ Years of Experience
Approval 98.9%·Filings 5,543·New hires 2,691·
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·FY 2025

Job description

In this role as a member of the STA CAD team, you will contribute to improving the performance of Apple Silicon. You will focus on static timing methodologies and address timing challenges on advanced tech nodes. Your work will involve developing flows and methodologies that drive timing analysis and closure for first-time-right silicon. This position requires collaboration with design teams and EDA vendors to enhance existing processes and solve technical problems.

Requirements

  • Minimum requirement of a BS degree and 3 years of relevant industry experience.
  • Experience with static timing analysis tools and flows.
  • Understanding of programming fundamentals and concepts.
  • Familiarity with Python and Tcl or other high-level programming languages.
  • Familiarity with STA of large high-performance SoC designs in deep sub-micron technologies.
  • Understanding of fundamentals in noise, cross-talk, variation, and timing margins.
  • Knowledge of timing/SDC constraints with hands-on experience in creation/validation being a plus.
  • Good communication skills to accurately assess and describe issues to management.

Responsibilities

  • Develop, maintain, and enhance existing gate-level STA flows for Apple silicon designs.
  • Work with design teams to understand and debug issues related to constraints, flow scripts, and timing closure.
  • Facilitate and drive STA methodology changes to improve overall STA flows as it relates to efficiency and productivity.
  • Develop and maintain scripts and methods for timing analysis and power reduction.
  • Develop and support methodologies, tools, and flows used in the verification of timing constraints.
  • Analyze timing paths to identify key issues, including post-silicon timing debug.
  • Work closely with EDA vendors to develop and incorporate new capabilities to solve technical problems.

Benefits

  • Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.

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