The Staff ASIC Design Verification Engineer at Google will focus on shaping the future of AI/ML hardware acceleration, specifically working on TPU technology. This role involves leading the functional verification team and developing advanced verification infrastructure. The engineer will collaborate closely with design, architecture, and performance teams to ensure compliance and performance goals are met. This position is part of a team that drives innovation in custom silicon solutions for Google's AI/ML applications.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
• Experience developing and maintaining verification testbenches, test cases, and test environments.

• Lead the functional verification team for significant portions of TPU designs.
• Develop advanced functional verification infrastructure such as subchip, subsystem, and fullchip level environments.
• Define and drive advanced verification strategies, including the use of simulation for bug hunting.
• Perform functional verification and performance validation for both pre-silicon and post-silicon phases.
• Analyze coverage from various dimensions and develop monitors and checkers for quality assurance.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.