The Senior Packaging Design Engineer role at Google focuses on developing custom silicon solutions for mobile SOC packages. The team aims to innovate hardware experiences that enhance performance and efficiency for Google's products. This position requires collaboration with various engineering teams to refine package architecture and ensure high-volume manufacturing. The engineer will also contribute to the development of new packaging technologies and silicon interfaces.

• Bachelor's degree in Mechanical, Material, Electrical Engineering, Technology, Science, or a related field, or equivalent practical experience.
• 5 years of experience in chip package substrate design using Cadence APD or Mentor Expedition.
• Experience in chip package substrate layout, design rules verification, and design for manufacturing.
• Experience in mobile SOC package design technologies such as FCCSP, Package on Package, and 2.5D/3D.

• Define, plan, and execute end-to-end physical package substrate design of mobile SOC packages.
• Manage and drive co-design initiatives across silicon, package, and system levels.
• Participate in the development of new silicon Internet Protocols and packaging technology.
• Collaborate closely with Signal Integrity, Power Integrity, Test, and Mechanical Engineering teams.
• Interface with packaging suppliers to ensure package design meets requirements for high volume manufacturing.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.