The Senior Design Verification Engineer will be part of a team focused on developing custom silicon solutions for Google's direct-to-consumer products. This role involves driving progress in verification methodologies and mentoring junior team members. The engineer will contribute to the innovation of hardware experiences that deliver high performance and efficiency. The position is integral to ensuring the quality and reliability of complex SoCs through effective verification processes.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
• Experience developing and maintaining verification test benches, test cases, and test environments.

• Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers.
• Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM).
• Debug tests with design engineers to deliver design blocks.
• Close coverage measures to identify verification holes and show progress towards tape-out.
• Identify and write all types of coverage measures for stimulus and corner-cases.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.