The RTL Design Engineer role at Google focuses on shaping the future of AI/ML hardware acceleration through the development of custom silicon solutions, specifically Tensor Processing Units (TPUs). The engineer will work within a team dedicated to pushing the boundaries of technology, contributing to the design and verification of complex digital designs. This position involves collaboration with various teams to ensure that designs meet performance and physical requirements. The role is pivotal in driving innovation that powers Google's AI/ML applications.

• PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Experience in silicon engineering through internships, academic research, or publications.
• Experience in a scripting language such as Python or Perl.
• Experience in Verilog or SystemVerilog.

• Develop SystemVerilog RTL to implement logic for ASIC products.
• Create and review design microarchitecture specifications.
• Develop methodology and tooling for design automation.
• Work with Design Validation teams to create test plans to verify and debug design RTL.
• Collaborate with Physical Design teams to ensure design meets physical requirements and timing closure.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.