As a Design Verification Engineer at Apple, you will play a crucial role in verifying the functionality and performance of Apple's premier SOCs. You will collaborate closely with design and micro-architecture teams to ensure the quality of SOCs, IPs, or subsystems. This position requires a strong understanding of functional and performance goals to develop effective test plans and methodologies. You will also be responsible for tracking bugs and analyzing coverage to achieve top results.

• Minimum of a Bachelor's degree with 0 years of relevant industry experience.
• Knowledge of computer architecture and digital design fundamentals.
• Familiarity with Verilog or SystemVerilog, digital simulation, and debugging.
• Experience with Python, Perl, or similar scripting languages.
• Excellent interpersonal skills and the ability to work independently.

• Review design and architecture specifications.
• Develop test plans, tests, and coverage plans.
• Communicate and collaborate with design, architecture, and software teams.
• Run and triage regressions and track bugs.
• Analyze coverage to achieve top results.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.