The ASIC Clocks Verification Engineer role at NVIDIA involves collaborating with various teams to verify high frequency clock structures for GPUs. The position requires engagement with architects, ASIC designers, and verification engineers to ensure the clock design meets architectural constraints. The engineer will also work on debugging GPU clock silicon bugs and propose improvements to enhance efficiency in clocking design. This role is essential for the development of cutting-edge GPU technology.

• A Master’s degree in Electrical Engineering or equivalent experience.
• Practical experience with SystemVerilog and Universal Verification Method (UVM).
• Experience with Design Verification, Logic Design, and Logic Synthesis.
• Strong coding skills in Python, Perl, or other industry-standard scripting languages.

• Collaborate with other architects, ASIC designers, and verification engineers to verify high frequency clock structures.
• Engage with multiple teams to design the GPU clock structure that satisfies architectural constraints.
• Deliver clock information to the SOC verification team, timing, and DFT teams.
• Use Perl to improve the productivity of the verification teams.
• Collaborate with the Software and product group to debug GPU clock silicon bugs.
• Identify improvements in the current design and propose new ways to enhance efficiency in GPU clocking design.

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.