NVIDIA is seeking a Low Power Design/Verification ASIC Engineer for new college graduates in 2026. This role focuses on developing energy-efficient GPU and SOC architectures, working closely with various teams to understand next-generation features. The engineer will be responsible for architecting and developing testbench infrastructure and test plans to verify power management solutions. This position offers the opportunity to influence methodologies and improve simulation and debug efficiencies.

• Recently completed a BS, MS, or PhD in Electrical or Computer Engineering or equivalent experience.
• Understanding of low power design techniques such as multi VT, clock gating, power gating, block activity power, and dynamic voltage-frequency scaling (DVFS).
• Good understanding of processor architecture, with GPU knowledge being a plus.
• Experience with Incisive Low-Power or Synopsys VCS NLP.
• Strong debug skills and experience with Verdi.
• Fluency in Verilog and SystemVerilog, with an understanding of UVM.

• Work closely with Low Power Architecture, Design, and Software teams to understand next-generation features.
• Architect and develop testbench infrastructure and test plans to verify various power management solutions for NVIDIA products.
• Bring creative ideas to improve power-aware DV methodologies.
• Influence EDA vendors to enhance simulation and debug efficiencies.

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.