The Principal Analog Design Engineer will lead the design and validation of advanced analog circuits for high-speed SerDes applications. This role requires strong technical leadership and mentorship for less experienced engineers while fostering collaboration across various engineering teams. The ideal candidate will have a proven track record in high-speed analog design, particularly within FinFET CMOS technology. Excellent communication and problem-solving skills are essential for success in this fast-paced environment.

• Master's degree in Electrical Engineering, Electronics Engineering, or a related field.
• 8+ years of experience in analog/mixed-signal circuit design for high-speed SerDes applications.
• Proven expertise in areas such as PLL, CDR, CTLE, DFE, ADC, or Transmitter design.
• Strong understanding of high-speed communication standards like PCIe and Ethernet.
• Hands-on experience with advanced FinFET CMOS process technologies (7nm or below).
• Proficiency in analog design and simulation tools such as Cadence Virtuoso/ADE or HSPICE.
• Experience in silicon bring-up, post-silicon validation, and lab debug of analog circuits.

• Lead the design and validation of complex analog and mixed-signal designs.
• Provide technical direction and mentorship to layout and less experienced engineers.
• Engage with cross-functional teams to ensure robust design implementation and validation.
• Participate in technical discussions across multiple disciplines.
• Deliver high-quality results in advanced FinFET CMOS technology.
• Communicate complex design concepts and results effectively.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.