The Lead Senior Design Engineer for AI SoC Development at Intel will play a crucial role in defining, implementing, and validating complex SoC IP blocks and subsystems. This position requires strong technical and communication skills, as the engineer will collaborate with various teams to ensure high-quality silicon for next-generation AI solutions. The role involves architectural leadership and mentorship of junior engineers, while also focusing on power, performance, and security requirements. This is an exciting opportunity to contribute to cutting-edge AI hardware development.

• Bachelor's or master's degree in electrical engineering, Computer Engineering, or Computer Science or related field with 10+ years of experience.
• 7+ years of experience in RTL design and implementation for ASIC/SoC development.
• Proven ability to solve complex design challenges such as clock domain crossings, power optimization, and timing closure.
• Hands-on experience with SoC system integration and multicore CPU subsystem design.
• Strong knowledge of standard bus protocols (AXI, AHB, etc.) and embedded processor architectures.
• Expertise in high-speed and low-power design techniques.
• Proficiency in scripting (Python, TCL, etc.) for automation and design flow optimization.
• Familiarity with industry-standard EDA tools: HDL simulators (VCS, Questa, IES), lint tools (Spyglass), and FPGA prototyping tools (Xilinx Vivado, Altera Quartus II).

• Evaluate trade-offs across features, performance targets, power constraints, and system limitations.
• Define and document microarchitecture for complex SoC IP blocks and implement RTL in Verilog/System Verilog.
• Collaborate with verification teams to ensure comprehensive coverage and robust validation of all design aspects.
• Develop and maintain timing constraints and guide physical design teams on synthesis, timing closure, and formal equivalence checks.
• Drive post-silicon validation, debug, and performance analysis.
• Mentor junior engineers and contribute to best practices for design methodology and quality.
• Perform quality checks across RTL, timing, and power convergence.
• Apply secure development practices to address security threat models and objectives.
• Collaborate with IP providers for integration and validation at the SoC level.
• Drive compliance for smooth IP-to-SoC handoff.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.