We are looking for an experienced IP Design Verification Engineer to ensure the functional integrity of our intellectual property designs. This role involves comprehensive verification of IP logic blocks and the development of robust verification environments. The engineer will collaborate with cross-functional teams to deliver high-quality silicon solutions and innovate verification processes. The position requires a strong background in digital design verification and familiarity with various verification tools and methodologies.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field with 6+ years of experience in digital design verification or related semiconductor engineering role.
• Experience in developing System Verilog & UVM based testbench for IP, subsystem or SoC level validation.
• Experience programming skills in Python or other scripting language.
• Experience with verification tools such as Synopsys VCS, Cadence Xcelium, or Mentor Questa.
• Experience with version control systems like Git or Perforce.

• Perform comprehensive functional verification of IP or subsystem logic blocks to ensure compliance with specification requirements.
• Develop and execute detailed verification plans, test benches, and verification environments with comprehensive coverage metrics.
• Create and maintain system simulation models to verify design functionality, analyze power consumption, and assess timing characteristics.
• Oversee development of UVM-based testbenches, constrained-random stimulus, and coverage closure.
• Identify, replicate, and debug issues in presilicon environments using advanced debugging methodologies.
• Implement corrective measures and resolution strategies for failing test cases and verification scenarios.
• Collaborate closely with system architects, RTL design engineers, and physical design teams to enhance verification of complex architectural features.
• Document comprehensive test plans and facilitate technical reviews with design and architecture stakeholders.
• Maintain and continuously improve existing functional verification infrastructure, tools, and methodologies.
• Ensure verification completeness across all IP functional domains.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.