JobsSenior Design Verification Engineer- Mixed Signal IP
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Senior Design Verification Engineer- Mixed Signal IP

Intel

Location

USA (Multiple Locations)

Type

Full-time

Posted

5/10/2026

Compensation

$164,470 - $311,890 per year

Undergraduate with 5+ Years of Experience
Approval 96.6%·Filings 2,117·New hires 632·
💎 Strong Sponsor
·FY 2025

Job description

This role at Intel focuses on the functional verification of mixed signal logic components, ensuring designs meet specification requirements. The team is dedicated to innovation and creating technology that enhances digital lives. Candidates will collaborate with architects and developers to improve verification processes and methodologies. This position offers the opportunity to work on cutting-edge technology in a dynamic environment.

Requirements

  • A BS degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field with 8+ years of relevant industry experience, or an MS degree with 6+ years, or a PhD with 4+ years.
  • Experience in design verification, System Verilog, and OVM/UVM.

Responsibilities

  • Perform functional verification of mixed signal logic components, including analog behavioral modeling.
  • Develop IP verification plans, test benches, and the verification environment.
  • Execute verification plans and define and run system simulation models.
  • Replicate, root cause, and debug issues in the presilicon environment.
  • Find and implement corrective measures to resolve failing tests.
  • Collaborate with digital and analog architects, RTL developers, and physical design teams.
  • Document test plans and drive technical reviews with design and architecture teams.
  • Maintain and improve existing functional verification infrastructure and methodology.

Benefits

  • Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.

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